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Solid State Electronic Devices by B.G. Streetman and S.K. Banerjee, 6th Ed.
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Published by The Indian Repring, in 2009. This book covers fundamental of solid state electronic devices from crystal growth, energy bands in semiconductors to junction theory and integrated circuits.

Vt = GU Q, = -~ where et is permittivity of the insulator and C, is the insulator capacitance per unit area. The charge ( will be negative for the n channel, giving a positive Vt. Using the depletion approximation, we can solve for W as a function of 4>s (Prob. 6.7). The result is the same as would be obtained for an n+-p junc tion in Chapter 5, for which the depletion region extends almost entirely into the p region: 6ln this chapter, we will use charge per unit area (Q) and capacitance per unit area (C) to avoid repealing A throughout the discussion. (6-27) (6-28) (6-29) 277 278 Chapter 6 Figure 6-15 Approximate dis tributions of charge, electric field, and electro static potential in the ideal MOS capacitor in inversion. The relative width of the inverted region is exaggerated for illustrative pur poses, but is neglected in the field and po tential diagrams. V>>0 7}' M| Charge Density Electric Field Electrostatic Potential o *x Q (charge per unit area) W
id: e7abd160318b7182a47d4c2492c9dfb9 - page: 295
Ei Lv -*~x Field-Effecf Transistors W = 2 eA .qNa. 1/2 (6-30) This depletion region grows with increased voltage across the capaci tor until strong inversion is reached. After that, further increases in voltage result in stronger inversion rather than in more depletion. Thus the maxi mum value of the depletion width is Wm = 2e^(inv.) qNa 1/2 = 2 skT\n(Na/ni) q2Na 1/2 (6-31) using Eq. (6-15). We know the quantities in this expression, so Wm can be calculated. The charge per unit area in the depletion region Qd at strong inversion is 7 Od=-qNaWm = 2(esqNa^F) 1/2 (6-32) The applied voltage must be large enough to create this depletion charge plus the surface potential 4> s(inv.).The threshold voltage required for strong inversion, using Eqs. (6-15), (6-28), and (6-29), is
id: 40d5357a199e5d00071c7d01e0285ef3 - page: 296
Qd VT = + 24>F {ideal case) (6-33) This assumes the negative charge at the semiconductor surface Q s at inversion is mostly due to the depletion charge Q d. The threshold voltage represents the minimum voltage required to achieve strong inversion, and is an extremely important quantity for MOS transistors. We will see in the next section that other terms must be added to this expression for real MOS structures. The capacitance-voltage characteristics of this ideal MOS structure (Fig. 6-16) vary depending on whether the semiconductor surface is in ac cumulation, depletion, or inversion. Since the capacitance for MOSFETs is voltage dependent, we must use the more general expression in Eq. (5-55) for the voltage-dependent semi conductor capacitance, C =
id: 7789e8ab701b101cedddbbf3e05e3325 - page: 297
(6-34)], such that the overall MOS ca pacitance becomes voltage dependent. The semiconductor capacitance itself can be determined from the slope of the Qs versus <f>5 plot (Fig. 6-14). It is 7ln the p-channel (n-type substrate) case, for which 0f is negative, we use Q^= +qN<jWm = 2 ( ^ / ^ 1 . 279 280 Chapter 6
id: 01612209572a9893a6f82186ee98217a - page: 297
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